Skip to main content

14 CPPC Extension (EID #0x43505043 "CPPC")

ACPI defines the Collaborative Processor Performance Control (CPPC) mechanism, which is an abstract and flexible mechanism for the supervisor-mode power-management software to collaborate with an entity in the platform to manage the performance of the processors.

The SBI CPPC extension provides an abstraction to access the CPPC registers through SBI calls. The CPPC registers can be memory locations shared with a separate platform entity such as a BMC. Even though CPPC is defined in the ACPI specification, it may be possible to implement a CPPC driver based on Device Tree.

Table 58 defines 32-bit identifiers for all CPPC registers to be used by the SBI CPPC functions. The first half of the 32-bit register space corresponds to the registers as defined by the ACPI specification. The second half provides the information not defined in the ACPI specification, but is additionally required by the supervisor-mode power-management software.

Table 58. CPPC Registers

Register IDRegisterBit WidthAttributeDescription
0x00000000HighestPerformance32Read-onlyACPI Spec 6.5: 8.4.6.1.1.1
0x00000001NominalPerformance32Read-onlyACPI Spec 6.5: 8.4.6.1.1.2
0x00000002LowestNonlinearPerformance32Read-onlyACPI Spec 6.5: 8.4.6.1.1.4
0x00000003LowestPerformance32Read-onlyACPI Spec 6.5: 8.4.6.1.1.5
0x00000004GuaranteedPerformanceRegister32Read-onlyACPI Spec 6.5: 8.4.6.1.1.6
0x00000005DesiredPerformanceRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.2.3
0x00000006MinimumPerformanceRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.2.2
0x00000007MaximumPerformanceRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.2.1
0x00000008PerformanceReductionToleranceRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.2.4
0x00000009TimeWindowRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.2.5
0x0000000ACounterWraparoundTime32 / 64Read-onlyACPI Spec 6.5: 8.4.6.1.3.1
0x0000000BReferencePerformanceCounterRegister32 / 64Read-onlyACPI Spec 6.5: 8.4.6.1.3.1
0x0000000CDeliveredPerformanceCounterRegister32 / 64Read-onlyACPI Spec 6.5: 8.4.6.1.3.1
0x0000000DPerformanceLimitedRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.3.2
0x0000000ECPPCEnableRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.4
0x0000000FAutonomousSelectionEnable32Read / WriteACPI Spec 6.5: 8.4.6.1.5
0x00000010AutonomousActivityWindowRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.6
0x00000011EnergyPerformancePreferenceRegister32Read / WriteACPI Spec 6.5: 8.4.6.1.7
0x00000012ReferencePerformance32Read-onlyACPI Spec 6.5: 8.4.6.1.1.3
0x00000013LowestFrequency32Read-onlyACPI Spec 6.5: 8.4.6.1.1.7
0x00000014NominalFrequency32Read-onlyACPI Spec 6.5: 8.4.6.1.1.7
0x00000015 - 0x7FFFFFFFReserved for future use.
0x80000000TransitionLatency32Read-onlyProvides the maximum (worst-case) performance state transition latency in nanoseconds.
0x80000001 - 0xFFFFFFFFReserved for future use.

14.1 Function: Probe CPPC register (FID #0)​

struct sbiret sbi_cppc_probe(uint32_t cppc_reg_id)

Probe whether the CPPC register as specified by the cppc_reg_id parameter is implemented or not by the platform.

If the register is implemented, sbiret.value will contain the register width. If the register is not implemented, sbiret.value will be set to 0.

The possible error codes returned in sbiret.error are shown in Table 59.

Table 59. CPPC Probe Errors

Error codeDescription
SBI_SUCCESSProbe completed successfully.
SBI_ERR_INVALID_PARAMcppc_reg_id is reserved.
SBI_ERR_FAILEDThe probe request failed for unspecified or unknown other reasons.

14.2 Function: Read CPPC register (FID #1)​

struct sbiret sbi_cppc_read(uint32_t cppc_reg_id)

Reads the register as specified in the cppc_reg_id parameter and returns the value in sbiret.value. When supervisor mode XLEN is 32, the sbiret.value will only contain the lower 32 bits of the CPPC register value.

The possible error codes returned in sbiret.error are shown in Table 60.

Table 60. CPPC Read Errors

Error codeDescription
SBI_SUCCESSRead completed successfully.
SBI_ERR_INVALID_PARAMcppc_reg_id is reserved.
SBI_ERR_NOT_SUPPORTEDcppc_reg_id is not implemented by the platform.
SBI_ERR_DENIEDcppc_reg_id is a write-only register.
SBI_ERR_FAILEDThe read request failed for unspecified or unknown other reasons.

14.3 Function: Read CPPC register high bits (FID #2)​

struct sbiret sbi_cppc_read_hi(uint32_t cppc_reg_id)

Reads the upper 32-bit value of the register specified in the cppc_reg_id parameter and returns the value in sbiret.value. This function always returns zero in sbiret.value when supervisor mode XLEN is 64 or higher.

The possible error codes returned in sbiret.error are shown in Table 61.

Table 61. CPPC Read Hi Errors

Error codeDescription
SBI_SUCCESSRead completed successfully.
SBI_ERR_INVALID_PARAMcppc_reg_id is reserved.
SBI_ERR_NOT_SUPPORTEDcppc_reg_id is not implemented by the platform.
SBI_ERR_DENIEDcppc_reg_id is a write-only register.
SBI_ERR_FAILEDThe read request failed for unspecified or unknown other reasons.

14.4 Function: Write to CPPC register (FID #3)​

struct sbiret sbi_cppc_write(uint32_t cppc_reg_id, uint64_t val)

Writes the value passed in the val parameter to the register as specified in the cppc_reg_id parameter.

The possible error codes returned in sbiret.error are shown in Table 62.

Table 62. CPPC Write Errors

Error codeDescription
SBI_SUCCESSWrite completed successfully.
SBI_ERR_INVALID_PARAMcppc_reg_id is reserved.
SBI_ERR_NOT_SUPPORTEDcppc_reg_id is not implemented by the platform.
SBI_ERR_DENIEDcppc_reg_id is a read-only register.
SBI_ERR_FAILEDThe write request failed for unspecified or unknown other reasons.

14.5 Function Listing​

Table 63. CPPC Function List

Function NameSBI VersionFIDEID
sbi_cppc_probe2.000x43505043
sbi_cppc_read2.010x43505043
sbi_cppc_read_hi2.020x43505043
sbi_cppc_write2.030x43505043