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RISC-V ISA ManualUnprivileged Privileged Profiles Assembly SBI IOMMU Trace Server Platform CTR Debug AIA

manual: 2d034e1

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Contributors
Change Log
1 Introduction
2 Terms and Abbreviations
3 Binary Encoding
4 Base Extension (EID #0x10)
5 Legacy Extensions (EIDs #0x00 - #0x0F)
6 Timer Extension (EID #0x54494D45 "TIME")
7 IPI Extension (EID #0x735049 "sPI: s-mode IPI")
8 RFENCE Extension (EID #0x52464E43 "RFNC")
9 Hart State Management Extension (EID #0x48534D "HSM")
10 System Reset Extension (EID #0x53525354 "SRST")
11 Performance Monitoring Unit Extension (EID #0x504D55 "PMU")
12 Debug Console Extension (EID #0x4442434E "DBCN")
13 System Suspend Extension (EID #0x53555350 "SUSP")
14 CPPC Extension (EID #0x43505043 "CPPC")
15 Nested Acceleration Extension (EID #0x4E41434C "NACL")
16 Steal-time Accounting Extension (EID #0x535441 "STA")
17 Supervisor Software Events Extension (EID #0x535345 "SSE")
18 SBI Firmware Features Extension (EID #0x46574654 "FWFT")
19 Debug Triggers Extension (EID #0x44425452 "DBTR")
20 Message Proxy Extension (EID #0x4D505859 “MPXY”)
21 Experimental SBI Extension Space (EIDs #0x08000000 - #0x08FFFFFF)
22 Vendor Specific Extension Space (EIDs #0x09000000 - #0x09FFFFFF)
23 Firmware Specific Extension Space (EIDs #0x0A000000 - #0x0AFFFFFF)
References

Contributors

Contributors

This RISC-V specification has been contributed to directly or indirectly by:

Yiting Wang <yiting.wang@windriver.com>

Copyright and license information